Baya Systems is hiring a Hardware Verification Engineer in Bengaluru. This is a full time role with on-site work. Salary is not disclosed in the listing. The original listing was published on Bayasystems and may include more detail about the shift, interview process and joining date. Confirm the salary, work mode and joining date directly with the employer before sharing any documents.
Baya Systems is inspired by the baya bird, also known as the weaver. Baya birds weave very unique and intricate hanging nests from different materials. The nests are robust and safe while being extremely lightweight and efficient.
Baya is a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era. We focus on software-driven, unified fabric solutions for single-die and multi-die systems. We design and license disruptive intellectual property for use in semiconductor chips, with software development platforms to simplify the design process and reduce the time to market for complex System-on-Chip (SoC) and multi-chiplet systems. This enables our partners to innovate and deliver compelling solutions for data center, infrastructure, AI, Automotive, and Edge IoT markets. We are looking for energetic and dedicated individuals share our passion for enabling innovation and excellence in the semiconductor industry that empowers game-changing products and services!
DESIGN VERIFICATION ENGINEER
BENGALURU, INDIA
About the role
We are seeking a seasoned Design Verification Engineer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions
Responsibilities:
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Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems
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Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards
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Collaborate with software teams to define and implement configurable test benches
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Work with design teams test plans, failure debug, coverage, etc.
Qualifications and Preferred Skills
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BS, MS in Electrical Engineering, Computer Engineering or Computer Science
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8+ years and current hands-on experience in block-level/IP-level/SoC-level verification
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Proficiency in Verilog, SystemVerilog
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Familiarity with industry-standard EDA tools for simulation and debug
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Deep experience with UVM-based test benches
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Experience with modern programming languages like Python
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Knowledge of Arm AMBA protocols such as AXI, APB, and AHB
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Understanding of Arm CHI protocol is a plus
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Experience on working with IPs for caches, cache coherency, memory subsystems, interconnects and NoCs
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Experience with formal verification techniques, emulation platforms is a plus
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Excellent problem-solving skills and attention to detail
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Strong communication and collaboration skills
Compensation
- Salary commensurate with experience
- Performance incentives
- Comprehensive medical, dental, and vision benefits
- 401(k) retirement plan
- Equity